Electromigration Modeling at Circuit Layout Level

Cher Ming Tan,Feifei He

Electromigration Modeling at Circuit Layout Level
Format
Paperback
Publisher
Springer Verlag, Singapore
Country
Singapore
Published
4 May 2013
Pages
103
ISBN
9789814451208

Electromigration Modeling at Circuit Layout Level

Cher Ming Tan,Feifei He

This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.

This item is not currently in-stock. It can be ordered online and is expected to ship in 7-14 days

Our stock data is updated periodically, and availability may change throughout the day for in-demand items. Please call the relevant shop for the most current stock information. Prices are subject to change without notice.

Sign in or become a Readings Member to add this title to a wishlist.