As semiconductor manufacturers implement copper conductors in advanced interconnect schemes, research and development efforts shift toward the selection of an insulator that can take maximum advantage of the lower power and faster signal propagation allowed by copper interconnects. One of the main challenges to integrating a low-dielectric constant (low-k) insulator as a replacement for silicon dioxide is the behaviour of such materials during the chemical-mechanical planarization (CMP) process used in Damascene patterning. Low-k dielectrics tend to be softer and less chemically reactive than silicon dioxide, providing significant challenges to successful removal and planarization of such materials. The focus of this text is to merge complex CMP models and mechanisms with experimental results with copper and low-&kgr to develop a comprehensive mechanism for low- and high-removal-rate processes. The result is a more in-depth look into the fundamental reaction kinetics that alter, selectively consume, and ultimately planarize a multi-material structure during Damascene patterning.