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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This is the textbook for Dr. Hongjiang Song's EEE598: VLSI Analog Circuit Design Based Symmetry class in Ira A. Fulton Schools of Engineering at Arizona State University. The course introduces structural VLSI analog circuit design concepts and techniques for analog circuit blocks and systems, such as the operational amplifiers, PLL/DLL, bandgap reference, A/D D/A converters. Symmetry principles and associated circuit constraints, structures and methods are adopted to mitigate VLSI PVT and other variations for better circuit performance, functionality, and design productivity across multiple VLSI process nodes.
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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This is the textbook for Dr. Hongjiang Song's EEE598: VLSI Analog Circuit Design Based Symmetry class in Ira A. Fulton Schools of Engineering at Arizona State University. The course introduces structural VLSI analog circuit design concepts and techniques for analog circuit blocks and systems, such as the operational amplifiers, PLL/DLL, bandgap reference, A/D D/A converters. Symmetry principles and associated circuit constraints, structures and methods are adopted to mitigate VLSI PVT and other variations for better circuit performance, functionality, and design productivity across multiple VLSI process nodes.