This text investigates the feasibility of designing delta-sigma analogue to digital converters for very low supply voltage and low power operation in standard CMOS processes. The chosen technique of implementation is the Switched Opamp Technique which provides switched capacitor operation at low supply voltage without the need to apply voltage multipliers or low VtMOST devices. A method of implementing the classic single loop and cascaded delta-sigma modulator topologies with half delay integrators is presented. Those topologies are studied in order to find the parameters that maximize the performance in terms of peak SNR. Based on a linear model, the performance degradations of higher order single loop and cascaded modulators, compared to a hypothetical ideal modulator, are quantified. An overview of low voltage switched capacitor design techniques, such as the use of voltage multipliers, low VtMOST devices and the Switched Opamp Technique, is given. A discussion of the present status of the Switched Opamp Technique covers the single-ended Original Switched Opamp Technique, the Modified Switched Opamp Technique, which allows lower supply voltage operation, and differential implementation including common mode control techniques. The restrictions imposed on the analogue circuits by low supply voltage operation are investigated. Several low voltage circuit building blocks, some of which are new, are discussed. A new low voltage class AB OTA, especially suited for differential Switched Opamp applications, together with a common mode feedback amplifier and a comparator are presented and analyzed. As part of a systematic top-down design approach, the non-ideal charge transfer of the Switched Opamp integrator cell is modelled, based upon several models of the main opamp non-ideal characteristics. Behavioural simulations carried out with these models yield the required opamp specifications that ensure that the intended performance is met in an implementation. A power consumption analysis is performed. The influence of all design parameters, especially the low power supply voltage, is highlighted. Design guidelines towards low power operation are distilled. Two implementations are presented together with measurement results. The first one is a single-ended implementation of a delta-sigma ADC operating with 1.5V supply voltage and consuming 100 mW for a 74 dB dynamic range in a 3.4 kHz bandwidth. The second implementation is differential and operates with 900 mV. It achieves 77 dB dynamic range in 16 kHz bandwidth and consumes 40 mW. This book is a reference for analogue design engineers and researchers.