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The rapid developments in communication systems have resulted in a need to perform encryption on data in real-time. Encryption of digital information in real-time holds the key to the successful growth of major applications in areas such as satellite communications and electronic commerce. Cryptography is typically a mathematically intensive process which, to date, has mainly been implemented in software. However, such methods are slow and cannot cope with the demands of rapidly growing broadband communication systems. Therefore, innovative hardware solutions involving mapping of complex mathematical operations onto special purpose silicon circuit architectures provide the only feasible solution. In this work, new generic silicon architectures for the DES and Rijndael symmetric key encryption algorithms are presented. The generic architectures can be utilised to rapidly and effortlessly generate system-on-chip cores, which support numerous application requirements, most importantly, different modes of operation and encryption and decryption capabilities. In addition, efficient silicon SHA-1, SHA-2 and HMAC hash algorithm architectures are described. A single-chip Internet Protocol Security (IPSec) architecture is also presented that comprises a generic Rijndael design and a highly efficient HMAC-SHA-1 implementation. In the opinion of the authors, highly efficient hardware implementations of cryptographic algorithms are provided in this book. However, these are not hard-fast solutions. The aim of the book is to provide a guide to the design and development process involved in the translation from encryption algorithm to silicon chip implementation.
