Networks on Chips: Technology and Tools
Giovanni De Micheli (Ecole Polytechnique Federale de Lausanne, Switzerland)
Networks on Chips: Technology and Tools
Giovanni De Micheli (Ecole Polytechnique Federale de Lausanne, Switzerland)
7 ½ X 9 ¼ in I. Introduction and Motivation
Why on chip networks?
State of the art Taxonomy Technology trends
II. Architectures for NoCs Direct vs indirect networks Topologies Sta ndard architectures and formal properties Ad hoc networks < BR id=‘CRLF’> III. Physical network layer
Wir ing issues Physical routing Signalling Driver/receiver design Noise immunity Sh ielding
IV. Data-link layer and encoding
Medium access control Data encoding
Error correcting codes: theory and practice Arbitration iss ues
V. Switching and Routing in NoCs
Packets, flits. Data forwarding schemes
Routing: algorithms and routers
QoS guarantees
VI. Software for NoCs Programming paradigms : shared medium vs message passing Middleware issues. layer
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