Paperback
Add to list Added to list A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof
Mikhail Kovalev,Silvia M. Muller,Wolfgang J. Paul
It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the…
Available to order, ships in 7-14 daysAvailable to order