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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This text presents methods used to make stacked chip packages in the so-called 2-½ D technology (3-D in physical format, but interconnected only through the circuits on folded flex). It is also being used in single chip packages where the thinness of the chips and the flex substrate made packages significantly thinner than through any other means. Much of the work in this field has not been widely disseminated other than by papers presented at conferences and workshops. This text is organized to report on the developments in this technology, but with special additional material and emphasis. The intent is to do more than report on present state of the art. It is intended as an advocacy book, pointing out the reasons for 3-D assemblies, the reasons for Silicon-in-a-Package multichip modules, and the commercial availability of the techniques. The contributing authors explore the needs, reveal the state of development and production, and point to changes in technology that can bring this technology into wider use for more complex applications.
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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This text presents methods used to make stacked chip packages in the so-called 2-½ D technology (3-D in physical format, but interconnected only through the circuits on folded flex). It is also being used in single chip packages where the thinness of the chips and the flex substrate made packages significantly thinner than through any other means. Much of the work in this field has not been widely disseminated other than by papers presented at conferences and workshops. This text is organized to report on the developments in this technology, but with special additional material and emphasis. The intent is to do more than report on present state of the art. It is intended as an advocacy book, pointing out the reasons for 3-D assemblies, the reasons for Silicon-in-a-Package multichip modules, and the commercial availability of the techniques. The contributing authors explore the needs, reveal the state of development and production, and point to changes in technology that can bring this technology into wider use for more complex applications.